Checkfu

Standard detail

12

Depth 1Parent ID: 8004832A61B24CD4A8C2CDC8D7518DADStandard set: Digital Electronics

Original statement

In teams, design a counter with between 16 and 32 states. Clock the counter using an oscillator of known frequency, and predict the frequency from each output (each bit in the counter). Simulate the counter to verify the prediction. If possible, the counter should be physically prototyped to verify the prediction and simulation. Calculate the error between the prediction and simulation or prototype. Produce a technical report to summarize findings. 

Quick facts

Statement code
12
List ID
12
Standard ID
F75AB22F71CA44228F4B2405A5D6920D
Subject
CTE (2020-)
Grades
10
Ancestor IDs
8004832A61B24CD4A8C2CDC8D7518DAD
Source document
Digital Electronics